Dr. Alberto Ferreira De Souza
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| - | + | Artigos completos publicados em periódicos | |
| - | + | 1. DE SOUZA, A. F. ; Buyya, Rajkumar . Guest Editorial Introduction to the Special Issue on the 18th International Symposium on Computer Architecture and High Performance Computing. International Journal of Parallel Programming, v. 36, p. 1-5, 2008. | |
| - | + | 2. ROUNCE, Peter ; DE SOUZA, A. F. . Dynamic Instruction Scheduling in a Trace-based Multi-threaded Architecture. International Journal of Parallel Programming, v. 1, p. 1000-1015, 2008. | |
| - | + | 3. Claudine S. B. Gonçalves ; PEDRONI, Felipe Thomaz ; De Souza, Alberto F. . Multi-Label Text Classification using VG-RAM Weightless Neural Networks (submetido). IEEE Transactions on Pattern Analysis and Machine Intelligence, v. -, p. ----, 2007. | |
| - | + | 4. SOUZA, Sotério Ferreira de ; De Souza, Alberto F. ; AMORIM, Claudio Luiz de ; LIMA, P. M. V. ; ROUNCE, Peter . Hardware Supported Synchronization Primitives for Multiprocessors (submetido). Cluster Computing, v. -, p. ----, 2007. | |
| - | + | 5. CARNEIRO, Raphael Vivacqua ; DIAS, Stiven Schwanz ; FARDIM JÚNIOR, Dijalma ; OLIVEIRA, Hallysson ; GARCEZ, Artur D'avila ; De Souza, A. F. . Improving VG-RAM Neural Networks Performance Using Knowledge Correlation. Lecture Notes in Computer Science, Berlin, v. 4232, p. 427-436, 2006. | |
| - | + | 6. ALMEIDA, Fernando Líbio Leite ; FREITAS, Christian Daros de ; De Souza, A. F. ; REIS JUNIOR, Neyval Costa . O Efeito da Latência no Desempenho da Arquitetura DTSVLIW. Revista Engenharia Ciência Tecnologia, Vitória - ES, v. 7, n. 2, p. 39-52, 2004. | |
| - | + | 7. NASCIMENTO, Edilson Luiz Do ; REIS JUNIOR, Neyval Costa ; De Souza, A. F. ; SANTOS, Jane Meri . Parallel Performance of a 3D Navier-Stokes Solution Algorithm for Clusters of Workstations. Revista Engenharia Ciência Tecnologia, Vitória - ES, v. 7, n. 1, p. 47-56, 2004. | |
| - | + | 8. KOMATI, Karin Satie ; De Souza, A. F. . Using Weightless Neural Networks for Vergence Control in an Artificial Vision System . Journal Of Applied Bionics And Biomechanics, Auckland, New Zealand, v. 1, n. 1, p. 21-32, 2003. | |
| - | + | 9. De Souza, A. F. ; ROUNCE, Peter . Dynamically Scheduling VLIW Instructions. Journal of Parallel and Distributed Computing, Orlando, Florida - USA, v. 60, n. 12, p. 1480-1511, 2000. | |
| - | + | 10. De Souza, A. F. ; ROUNCE, Peter . Effect of Multicycle Instructions on the Integer Performance of the Dynamically Trace Scheduled VLIW Architecture. Lecture Notes in Computer Science, v. 1593, p. 1203-1206, 1999. | |
| - | + | 11. De Souza, A. F. ; ROUNCE, Peter . Dynamically Trace Scheduled VLIW Architectures. Lecture Notes in Computer Science, Berlin, v. 1401, p. 993-995, 1998. | |
| - | + | 12. De Souza, A. F. ; FERNANDES, Edil Severiano Tavares ; WOLFE, A. . On the Balance of VLIW Architectures. Journal of Systems Architecture, The Netherlands, v. 43, p. 15-22, 1997. | |
| - | + | 13. FERNANDES, Edil Severiano Tavares ; AMORIM, Claudio Luiz de ; BARBOSA, Valmir Carneiro ; FRANÇA, Felipe Maia Galvão ; De Souza, A. F. . MPH - A Hybrid Parallel Machine. Microprocessing And Microprogramming, The Netherlands, v. 25, p. 229-232, 1989. | |
Revision as of 23:04, 18 April 2008
Artigos completos publicados em periódicos 1. DE SOUZA, A. F. ; Buyya, Rajkumar . Guest Editorial Introduction to the Special Issue on the 18th International Symposium on Computer Architecture and High Performance Computing. International Journal of Parallel Programming, v. 36, p. 1-5, 2008. 2. ROUNCE, Peter ; DE SOUZA, A. F. . Dynamic Instruction Scheduling in a Trace-based Multi-threaded Architecture. International Journal of Parallel Programming, v. 1, p. 1000-1015, 2008. 3. Claudine S. B. Gonçalves ; PEDRONI, Felipe Thomaz ; De Souza, Alberto F. . Multi-Label Text Classification using VG-RAM Weightless Neural Networks (submetido). IEEE Transactions on Pattern Analysis and Machine Intelligence, v. -, p. ----, 2007. 4. SOUZA, Sotério Ferreira de ; De Souza, Alberto F. ; AMORIM, Claudio Luiz de ; LIMA, P. M. V. ; ROUNCE, Peter . Hardware Supported Synchronization Primitives for Multiprocessors (submetido). Cluster Computing, v. -, p. ----, 2007. 5. CARNEIRO, Raphael Vivacqua ; DIAS, Stiven Schwanz ; FARDIM JÚNIOR, Dijalma ; OLIVEIRA, Hallysson ; GARCEZ, Artur D'avila ; De Souza, A. F. . Improving VG-RAM Neural Networks Performance Using Knowledge Correlation. Lecture Notes in Computer Science, Berlin, v. 4232, p. 427-436, 2006. 6. ALMEIDA, Fernando Líbio Leite ; FREITAS, Christian Daros de ; De Souza, A. F. ; REIS JUNIOR, Neyval Costa . O Efeito da Latência no Desempenho da Arquitetura DTSVLIW. Revista Engenharia Ciência Tecnologia, Vitória - ES, v. 7, n. 2, p. 39-52, 2004. 7. NASCIMENTO, Edilson Luiz Do ; REIS JUNIOR, Neyval Costa ; De Souza, A. F. ; SANTOS, Jane Meri . Parallel Performance of a 3D Navier-Stokes Solution Algorithm for Clusters of Workstations. Revista Engenharia Ciência Tecnologia, Vitória - ES, v. 7, n. 1, p. 47-56, 2004. 8. KOMATI, Karin Satie ; De Souza, A. F. . Using Weightless Neural Networks for Vergence Control in an Artificial Vision System . Journal Of Applied Bionics And Biomechanics, Auckland, New Zealand, v. 1, n. 1, p. 21-32, 2003. 9. De Souza, A. F. ; ROUNCE, Peter . Dynamically Scheduling VLIW Instructions. Journal of Parallel and Distributed Computing, Orlando, Florida - USA, v. 60, n. 12, p. 1480-1511, 2000. 10. De Souza, A. F. ; ROUNCE, Peter . Effect of Multicycle Instructions on the Integer Performance of the Dynamically Trace Scheduled VLIW Architecture. Lecture Notes in Computer Science, v. 1593, p. 1203-1206, 1999. 11. De Souza, A. F. ; ROUNCE, Peter . Dynamically Trace Scheduled VLIW Architectures. Lecture Notes in Computer Science, Berlin, v. 1401, p. 993-995, 1998. 12. De Souza, A. F. ; FERNANDES, Edil Severiano Tavares ; WOLFE, A. . On the Balance of VLIW Architectures. Journal of Systems Architecture, The Netherlands, v. 43, p. 15-22, 1997. 13. FERNANDES, Edil Severiano Tavares ; AMORIM, Claudio Luiz de ; BARBOSA, Valmir Carneiro ; FRANÇA, Felipe Maia Galvão ; De Souza, A. F. . MPH - A Hybrid Parallel Machine. Microprocessing And Microprogramming, The Netherlands, v. 25, p. 229-232, 1989.